K5E5658HCM-D060 Note

1 Page    = 512 Bytes(Data) + 16 Bytes(Spare Area)

1 Block   = 32 Pages 
          = 16 KBytes(Data) + 512 Bytes (= 32 * 16 Bytes) (Spare Area)

1 Device  = 2048 Blocks 
          = 64K Pages (= 2048 * 32 Pages)
          = 32 MBytes (= 2048 * 16KBtes) (Data) +
            1 MBytes (= 2048 * 512Bytes) (Spare Area)

A Page can be devided to 1st half page and 2nd half page.

Address Mapping:

A24 - A9 : (16 bits = 2^16 = 64K) Used to address the Page. (= Page Address)

A8 : Used to indicate the 1st half page or 2nd half page. A8 is set to "Low" or "High" by the 00h or 01h Command. (If using word-level addressing, 01h command is not available.)

A0 - A7 : (8 bits = 2^8 = 256), used to address which byte in the half page indicated by A8.


I/O bus : 16 bits bus (Provide byte-level or word-level data transfer/addressing)


Valid Block:

1. may include invalid blocks(bad blocks) when first ship.
2. The 1st block of the device is guaranteed to be a valid block(16KBytes). No need ECC upto 1K Program/Erase cycles.
3. The 2nd and 3rd blocks are good upon shipping.
4. Minimun 1004 valid blocks are guaranteed for each continus 128Mb(=16MBytes) memory space. (This seems not so important.)
   

Misc:

1. Read operations are executed in page basis.
2. Erase operations are executed in block basis.
3. Include one block sized OTP (One Time Programmable).